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Accelerating colour space conversion on reconfigurable hardware

Bensaali, F and Amira, A (2005) Accelerating colour space conversion on reconfigurable hardware. IMAGE AND VISION COMPUTING, 23 (11). pp. 935-942. [Journal article]

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DOI: 10.1016/j.imavis.2005.03.006


Colour space conversion is very important in many types of image processing applications including video compression. This operation consumes up to 40% of the entire processing power of a highly optimised decoder. Therefore, techniques which efficiently implement this conversion are desired. This paper presents two novel architectures for efficient implementation of a Colour Space Converter (CSC) suitable for Field Programmable Gate Array (FPGAs) and VLSI. The proposed architectures are based on Distributed Arithmetic (DA) ROM accumulator principles. The architectures have been implemented and verified using the Celoxica RC1000 FPGA development board. In addition, they are platform independent and have a low latency (eight cycles). The first architecture has a throughput of height, while the second one is fully pipelined and has a throughput of one and capable of sustained data rate of over 234 mega-conversions/s. (c) 2005 Elsevier B.V. All rights reserved.

Item Type:Journal article
Keywords:colour space conversion; field programmable gate array; distributed arithmetic
Faculties and Schools:Faculty of Computing & Engineering
Faculty of Computing & Engineering > School of Engineering
Research Institutes and Groups:Engineering Research Institute
Engineering Research Institute > Nanotechnology & Integrated BioEngineering Centre (NIBEC)
ID Code:13438
Deposited By: Dr Abbes Amira
Deposited On:02 Jun 2010 08:22
Last Modified:14 Apr 2014 09:04

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