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Challenges for Semiconductor Test Engineering: A Review Paper

Vock, Stefan R, Escalona, OJ, Turner, Colin and Owens, FJ (2012) Challenges for Semiconductor Test Engineering: A Review Paper. Journal of Electronic Testing: Theory and Applications (JETTA), 28 (3). pp. 365-374. [Journal article]

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Today’s economical cycles challenge the test program generation process for semiconductors with regard to productivity, time-to-market, increasing quality requirements and manufacturing robustness, while, at the same time, the complexity of the system-on-a-chip mixed-signal integrated circuits to be tested increases significantly. Furthermore, commercial challenges in combination with competitive advantage become an important factor, not only within semiconductor manufacturing, but also within test program development. This paper provides a review of these challenges, and how they might be addressed. We first give a short introduction and background on semiconductor testing and test development with the focus on mixed-signal and systems-on-chip. This is followed by current roadmaps and considerations for test program software development. Based on the highlighted strength and weaknesses of the reviewed approaches, the authors conclude with some recommendations to address these challenges by adopting software engineering methods for the test program development process.

Item Type:Journal article
Keywords:Semiconductor test, software quality, productivity, automated test equipment, system-on-a-chip test, mixed-signal test, test engineering
Faculties and Schools:Faculty of Computing & Engineering
Faculty of Computing & Engineering > School of Engineering
Research Institutes and Groups:Engineering Research Institute
Engineering Research Institute > Nanotechnology & Integrated BioEngineering Centre (NIBEC)
ID Code:20880
Deposited By: Professor Omar Escalona
Deposited On:28 Dec 2012 08:56
Last Modified:28 Dec 2012 08:56

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