Harkin, JG, McGinnity, TM and Maguire, LP (2004) Modeling and Optimizing Run-time Reconfiguration Using Evolutionary Computation. ACM Transactions in Embedded Computing Systems, 3 (4). pp. 661-685. [Journal article]
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The hardware--software (HW--SW) partitioning of applications to dynamically reconfigurable embedded systems allows for customization of their hardware resources during run-time to meet the demands of executing applications. The run-time reconfiguration (RTR) of such systems can have an impact on the HW--SW partitioning strategy and the system performance. It is therefore important to consider approaches to optimally reduce the RTR overhead during the HW--SW partitioning stage. In order to examine potential benefits in performance, it is necessary to develop a method to model and evaluate the RTR. In this paper, a novel method of modeling and evaluating such RTR-reduced HW--SW partitions is presented. The techniques of computation-reconfiguration overlap and the retention of circuitry between reconfigurations are used within this model to explore the possibilities of RTR reduction. The integration of this model into the authors current genetic-algorithm-driven HW--SW partitioner is also presented, with two applications used to illustrate the benefits of RTR-reduced exploration during HW--SW partitioning.
|Item Type:||Journal article|
|Faculties and Schools:||Faculty of Computing & Engineering|
Faculty of Computing & Engineering > School of Computing and Intelligent Systems
|Research Institutes and Groups:||Computer Science Research Institute|
Computer Science Research Institute > Intelligent Systems Research Centre
|Deposited By:||Dr Jim Harkin|
|Deposited On:||20 Jan 2010 16:04|
|Last Modified:||11 Mar 2015 15:32|
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